In the last chapter we devised a way to tame the issue with fpscr. Today we are going to complete the code generation bits that we are still missing so we can start emitting code.

In the last chapter we modelled the storage in form of pairs and quadruples of registers that we will use for vectors of double and single precision, respectively.

But before we can do anything we need to deal with fpscr.

In the previous installment we discussed a bit how to generate code using the vector feature of the CPU of the Raspberry Pi 1.

Let’s start hacking LLVM.

Long ago, we saw that the Raspberry Pi 1 has vector computation capabilities. However to the best of my knowledge no compiler attempted to exploit the vector capability in general.

I think we are going to have some fun in trying to fix this.

A colleague of mine spent some time chasing a bug in a C++ library related to concurrency.

At the end it all boiled down to a silly declaration that wasn’t one.